RISC-V is, like x86 and ARM, an instruction set architecture (ISA). Unlike x86 and ARM, it is a free and open standard that anyone can use without getting locked into someone else's processor designs ...
If you read Japanese, you might have seen the book “Design and Implementation of Microkernels” by [Seiya Nuda]. An appendix covers how to write your own operating system for RISC-V in about 1,000 ...
The Roma laptop was developed by Deep Digital Intelligence and debugged by Jianshi Technology. It is a collaborative project spearheaded by the RISC-V Foundation. The laptop is designed to provide ...
In an attempt to accelerate RISC-V adoption, a global consortium of industry leaders has banded together to form the RISC-V Software Ecosystem (RISE) Project. According to the project’s press release, ...
The Android ecosystem is hurtling toward a RISC-V future. The puzzle pieces for the up-and-coming CPU architecture started falling into place this past year when Google announced official RISC-V ...
While ARM continues to make inroads into the personal computing market against traditional chip makers like Intel and AMD, it’s not a perfect architecture and does have some disadvantages. While it’s ...
U.S. chipmaker GlobalFoundries Inc. is moving into the RISC-V processor business after announcing plans to buy the chip developer MIPS Technology LLC for an undisclosed price. GlobalFoundries said it ...
The Android Common Kernel is about to remove support for the RISC-V architecture. Android Common Kernel is Google’s fork of the upstream Linux kernel but with Android-specific additions. RISC-V is an ...
Calista Redmond, chief executive of the microprocessor consortium RISC-V International, is a fan of the wild days of chip competition back in the 1980s. "This is the biggest opportunity to change the ...
Want smarter insights in your inbox? Sign up for our weekly newsletters to get only what matters to enterprise AI, data, and security leaders. Subscribe Now RISC-V International said it has grown ...
The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...
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